TY - GEN
T1 - A 1V 10b 60MS/s hybrid opamp-reset/switched-RC pipelined ADC
AU - Carnes, Josh
AU - Ahn, Gil Cho
AU - Moon, Un Ku
PY - 2007
Y1 - 2007
N2 - The fully differential Opamp Reset Switching Technique (ORST) for low voltage applications is presented. The technique is demonstrated in a 1V, 10-bit, 60MS/s pipelined ADC where a hybrid ORST/Switched-RC topology is adopted for improved accuracy at low voltage supplies and achieves 50dB SNDR in 0.18μm CMOS while dissipating 34mW. The architecture also uses a passive input track-and-reset to save power and has an input bandwidth greater than 90MHz.
AB - The fully differential Opamp Reset Switching Technique (ORST) for low voltage applications is presented. The technique is demonstrated in a 1V, 10-bit, 60MS/s pipelined ADC where a hybrid ORST/Switched-RC topology is adopted for improved accuracy at low voltage supplies and achieves 50dB SNDR in 0.18μm CMOS while dissipating 34mW. The architecture also uses a passive input track-and-reset to save power and has an input bandwidth greater than 90MHz.
UR - https://www.scopus.com/pages/publications/51349125382
U2 - 10.1109/ASSCC.2007.4425774
DO - 10.1109/ASSCC.2007.4425774
M3 - Conference contribution
AN - SCOPUS:51349125382
SN - 1424413605
SN - 9781424413607
T3 - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
SP - 236
EP - 239
BT - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
T2 - 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
Y2 - 12 November 2007 through 14 November 2007
ER -