Skip to main navigation Skip to search Skip to main content

A flow solver for a reconfigurable FPGA-based hypercomputer

  • Thomas Hauser
  • Utah State University
  • AIAA

Research output: Abstract › Paper › peer-review

9 Scopus citations

Abstract

This paper details initial efforts to program a basic, compressible flow solver on a reconfigurable fleld-programmable-gate-array- (FPGA) based computer manufactured by Star Bridge Systems, Inc. An FPGA is an array of Silicon gates on a computer chip that can be reconfigured by programmers in the field for specific problems. In addition to the dynamic nature of FPGA hardware (which enables optimization to specific applications), FPGAs are also inherently parallel. This enables programmers to make as many operations run concurrently as they can physically fit on the FPGA, using its resources more efficiently than is possible on a CPU. Basic object like vectors and matrices and their corresponding operations like dot-product, matrix-vector and matrix-matrix multiplication were implemented. These basic components were then used to build a one-dimensional, explicit compressible flow solver.

Original languageEnglish
Pages1019-1029
Number of pages11
StatePublished - 2005
Externally publishedYes
Event43rd AIAA Aerospace Sciences Meeting and Exhibit - Reno, NV, United States
Duration: Jan 10 2005 → Jan 13 2005

Conference

Conference43rd AIAA Aerospace Sciences Meeting and Exhibit
Country/TerritoryUnited States
CityReno, NV
Period01/10/05 → 01/13/05

Fingerprint

Dive into the research topics of 'A flow solver for a reconfigurable FPGA-based hypercomputer'. Together they form a unique fingerprint.

Cite this